Signal Integrity: Back to Basics

Entries from September 2009

ADS 2009 Signal Integrity Eye Diagram Solutions

September 15, 2009 · Leave a Comment

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We’ve Moved! Please Updated Your Bookmarks!

September 5, 2009 · Leave a Comment

The overhead of syndicating the content here seems to outweigh the benefits, so this is the last post here. Please bookmark our new Signal Integrity site instead. Thanks!

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GPU-Accelerated Time-Domain Circuit Simulation Paper at CICC

September 2, 2009 · Leave a Comment

(Syndicated content from: http://signal-integrity-tips.com/2009/gpu-accelerated-time-domain-circuit-simulation-paper-at-cicc/)

IEEE CICC logo

Tired of waiting for your SPICE simulations to complete?

My colleague Rick Poore will be presenting IEEE Custom Integrated Circuits Conference (CICC) paper 20-3 about his work on “GPU-Accelerated Time-Domain Circuit Simulation” in San Jose at 11:05AM on Wednesday, September 16th.

Abstract

Time-domain circuit simulation is dominated by transistor model evaluation. A modern graphics processing unit (GPU) is a parallel, high performance computer suitable for non-graphics tasks. Simulation is sped up by 3-6x by moving transistor evaluation to a GPU. Implications for writing transistor models for good GPU performance are discussed.

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Geometric Form Factor for Transmission Lines

September 1, 2009 · Leave a Comment

(Syndicated content from: http://signal-integrity-tips.com/2009/geometric-form-factor-for-transmission-lines/)

The concept of a geometric form factor is very useful when thinking about transmission lines. It bundles up all the messy 2D geometry of cross-sections and field line patterns into one scalar quantity that is fixed for a particular configuration. Then you can think about the general concepts without getting bogged down in field integrals and field solvers.

To explore this idea, let’s start with a uniform relative dielectric constant εr like you’d have with stripline. (Later we’ll generalize to the case where the field lines “sees” a mixture of materials, for example dielectric and air for a microstrip.)

First define a unitless geometric form factor, F, such that capacitance per unit length, C, is:
C is epsilon 0 epsilon r / F
…where ε0 is the vacuum permittivity, 8.9pF/m (or 0.22pF/inch) and εr is the relative permittivity (relative dielectric constant), ~4.2 to 4.6 in FR4 glass/resin.

In general, we need a 2D electrostatic solver to determine F but let’s first look at a geometry for which there’s an exact, textbook, analytical solution: a rod of radius a, with its center a distance b above a ground plane like this:
rod above plane
The form factor is:
Form factor for rod above plane
Couple of thing to note about F:
Unitless: F is a function of a geometric ratio, b/a.
Logarithm of a smallish ratio: In practical cases, the numerator and divisor are not of wildly different orders of magnitude. You wouldn’t create a transmission line with a = 1 mm and b = 1 km! No, for the realistic range of values of b/a, the natural logarithm of the function here is of order 1. For example if b=2a, then F is 0.21.

Let’s plot it and two other configurations (illustrated below) and you’ll see that (apart from the “short circuit” corner case at a = b) the blue curve varies slowly with b/a:

Plot of form factor for rod above plane, coax, and stripline
The neat thing about the form factor is that when you have it for capacitance, you get inductance and impedance “for free.” To see the first of these, consider the propagation velocity, v, which is both:
Form factor for rod above plane
With a little algebra you can see that the inductance per unit length, L is given by:
L = Fμ0
…where μ0 is the vacuum permeability, 1.3 μH/m
Thus, you can think of F as “how inductive the geometry is versus the free space value of 1.”
If F < 1 the geometry is “more capacitive” than free space, if F > 1 it’s “more inductive.”
The second benefits is that once you have L and C, you also have impedance. Again a little algebra shows that:
Form factor for rod above plane
…where Z0 is the vacuum impedance, 377 Ω. The form factor and the relative dielectric constant determine how far the line impedance is from the “natural” value of Ω. A “capacitive” form factor < 1 lowers the impedance, as does a higher relative dielectric constant. If εr = 4.2, and you want Z = 50 Ω, then pick your geometry such that F is 0.27.

If you take the ground plane and wrap it around the rod, you get co-ax:
coaxial cylinders
The form factor (magenta line above) is a bit lower (more capacitive) as you’d expect from bring the ground plane closer.

If instead you squash the rod into a ribbon and put a second ground plane on top, you get stripline:
stripline
The result is a bit less capactive, because the squashing increases the separation from ground.

You can generalize this idea to non-uniform dielectrics by using a blended or “effective” relative dielectric constant. In a future posting, I’ll also show how it’s useful for lumped elements like inductors from flat coils, and short and long solenoids.

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